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| BSS84 P-channel enhancement mode vertical DMOS transistor Rev. 05 -- 9 December 2008 Product data sheet 1. Product profile 1.1 General description P-channel enhancement mode vertical Diffusion Metal-Oxide Semiconductor (DMOS) transistor in a small Surface-Mounted Device (SMD) plastic package. Table 1. Product overview Package NXP BSS84 BSS84/DG [1] /DG: halogen-free Type number[1] JEDEC TO-236AB SOT23 1.2 Features I Low threshold voltage I High-speed switching I Direct interface to CMOS and Transistor-Transistor Logic (TTL) I No secondary breakdown 1.3 Applications I Line current interrupter in telephone sets I Relay, high-speed and line transformer drivers 1.4 Quick reference data I VDS -50 V I RDSon 10 I ID -130 mA I Ptot 250 mW NXP Semiconductors BSS84 P-channel enhancement mode vertical DMOS transistor 2. Pinning information Table 2. Pin 1 2 3 Pinning Symbol G S D Description gate source drain 1 2 G S 001aaa025 Simplified outline 3 Graphic symbol D SOT23 (TO-236AB) 3. Ordering information Table 3. Ordering information Name BSS84 BSS84/DG [1] /DG: halogen-free Type number[1] Package Description Version SOT23 TO-236AB plastic surface-mounted package; 3 leads 4. Marking Table 4. BSS84 BSS84/DG [1] [2] /DG: halogen-free * = -: made in Hong Kong * = p: made in Hong Kong * = t: made in Malaysia * = W: made in China Marking codes Marking code[2] 13* ZV* Type number[1] BSS84_5 (c) NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 -- 9 December 2008 2 of 11 NXP Semiconductors BSS84 P-channel enhancement mode vertical DMOS transistor 5. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VDS VGS ID Parameter drain-source voltage gate-source voltage drain current Tsp = 25 C; VGS = -10 V; see Figure 1 Tsp = 100 C; VGS = -10 V IDM Ptot Tstg Tj [1] Conditions 25 C Tj 150 C Min [1] Max -50 20 -130 -75 -520 250 +150 +150 Unit V V mA mA mA mW C C peak drain current total power dissipation storage temperature junction temperature Tsp = 25 C; tp 10 s; see Figure 1 Tsp = 25 C; see Figure 4 -65 -65 Device mounted on a Printed-Circuit Board (PCB). -103 ID (mA) -102 (1) mld251 tp = 10 s 100 s 1 ms 10 ms 100 ms -10 DC -1 -1 -10 VDS (V) -102 Tsp = 25 C (1) RDSon limitation Fig 1. Safe operating area; continuous and peak drain currents as a function of drain-source voltage BSS84_5 (c) NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 -- 9 December 2008 3 of 11 NXP Semiconductors BSS84 P-channel enhancement mode vertical DMOS transistor 300 Ptot (mW) mld199 200 100 0 0 50 100 150 200 Tamb (C) Fig 2. Power derating curve 6. Thermal characteristics Table 6. Symbol Rth(j-a) [1] Thermal characteristics Parameter thermal resistance from junction to ambient Conditions see Figure 3 [1] Min - Typ - Max 500 Unit K/W Mounted on a PCB, vertical in still air. 103 Rth(j-a) (K/W) 102 = 0.75 0.5 0.2 0.1 0.05 10 0.02 0.01 P mld250 = tp T 1 0 tp T t 10-1 10-6 10-5 10-4 10-3 10-2 10-1 1 10 102 tp (s) 103 Fig 3. Transient thermal impedance from junction to ambient as a function of pulse duration BSS84_5 (c) NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 -- 9 December 2008 4 of 11 NXP Semiconductors BSS84 P-channel enhancement mode vertical DMOS transistor 7. Characteristics Table 7. Characteristics Tj = 25 C unless otherwise specified. Symbol V(BR)DSS VGS(th) Parameter Conditions Min -50 Typ Max Unit V Static characteristics drain-source breakdown ID = -10 A; VGS = 0 V voltage gate-source threshold voltage ID = -1 mA; VDS = VGS; see Figure 8 Tj = 25 C Tj = -55 C IDSS drain leakage current VDS = -40 V; VGS = 0 V Tj = 25 C VDS = -50 V; VGS = 0 V Tj = 25 C Tj = 125 C IGSS RDSon gate leakage current drain-source on-state resistance VGS = +20 V; VDS = 0 V VGS = -20 V; VDS = 0 V VGS = -10 V; ID = -130 mA; see Figure 5 and 7 VDS = -25 V; ID = -130 mA VGS = 0 V; VDS = -25 V; f = 1 MHz; see Figure 9 6 -10 -60 100 100 10 A A nA nA -100 nA -0.8 -2 -1.8 V V Dynamic characteristics |Yfs| Ciss Coss Crss ton transfer admittance input capacitance output capacitance reverse transfer capacitance turn-on time VDS = -40 V; VGS = 0 V to -10 V; ID = -200 mA; see Figure 10 and 11 VDS = -40 V; VGS = -10 V to 0 V; ID = -200 mA; see Figure 10 and 11 50 25 15 3.5 3 45 25 12 mS pF pF pF ns toff turn-off time - 7 - ns BSS84_5 (c) NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 -- 9 December 2008 5 of 11 NXP Semiconductors BSS84 P-channel enhancement mode vertical DMOS transistor -600 ID (mA) -400 VGS = -10 V -7.5 V -6 V mld197 60 RDSon () mld198 VGS = -2.5 V -3 V -4 V -5 V -5 V 40 -200 -4 V 20 -3 V -2.5 V -7.5 V -10 V 0 -1 -10 -102 -103 0 0 -2 -4 -6 -8 -10 -12 VDS (V) ID (mA) Tj = 25 C Tj = 25 C Fig 4. Output characteristics: drain current as a function of drain-source voltage; typical values mld196 Fig 5. Drain-source on-state resistance as a function of drain current; typical values -600 ID (mA) -400 1.8 RDSon RDSon(25C) mld194 (1) (2) 1.4 -200 1.0 0 0 -2 -4 -6 -8 -10 VGS (V) 0.6 -50 0 50 100 Tj (C) 150 Tj = 25 C; VDS = -10 V (1) ID = -130 mA; VGS = -10 V (2) ID = -20 mA; VGS = -2.4 V Fig 6. Transfer characteristics: drain current as a function of gate-source voltage; typical values Fig 7. Normalized drain-source on-state resistance factor as a function of junction temperature BSS84_5 (c) NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 -- 9 December 2008 6 of 11 NXP Semiconductors BSS84 P-channel enhancement mode vertical DMOS transistor 1.2 VGSth VGSth(25C) 1.0 mld195 80 C (pF) 60 mld191 40 Ciss 20 Coss Crss 0.6 -50 0 0 50 100 Tj (C) 150 0 -10 -20 -30 0.8 VDS (V) ID = -1 mA; VDS = VGS VGS = 0 V; f = 1 MHz Fig 8. Gate-source threshold voltage as a function of junction temperature Fig 9. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values 8. Test information 10 % VDS = -40 V INPUT 90 % 10 % 0V -10 V 50 OUTPUT ID 90 % ton mld189 toff mbb690 Fig 10. Switching time test circuit Fig 11. Input and output waveforms BSS84_5 (c) NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 -- 9 December 2008 7 of 11 NXP Semiconductors BSS84 P-channel enhancement mode vertical DMOS transistor 9. Package outline Plastic surface-mounted package; 3 leads SOT23 D B E A X HE vMA 3 Q A A1 1 e1 e bp 2 wMB detail X Lp c 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.9 A1 max. 0.1 bp 0.48 0.38 c 0.15 0.09 D 3.0 2.8 E 1.4 1.2 e 1.9 e1 0.95 HE 2.5 2.1 Lp 0.45 0.15 Q 0.55 0.45 v 0.2 w 0.1 OUTLINE VERSION SOT23 REFERENCES IEC JEDEC TO-236AB JEITA EUROPEAN PROJECTION ISSUE DATE 04-11-04 06-03-16 Fig 12. Package outline SOT23 (TO-236AB) BSS84_5 (c) NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 -- 9 December 2008 8 of 11 NXP Semiconductors BSS84 P-channel enhancement mode vertical DMOS transistor 10. Revision history Table 8. BSS84_5 Modifications: Revision history Release date 20081209 Data sheet status Product data sheet Change notice Supersedes BSS84_4 Document ID * * * * Type number BSS84/DG added Table 1 "Product overview": added Table 4 "Marking codes": added Section 11 "Legal information": updated Product data sheet Product specification Product specification Product specification BSS84_3 BSS84_2 BSS84_1 - BSS84_4 BSS84_3 BSS84_2 BSS84_1 20070717 20030804 19970618 19950407 BSS84_5 (c) NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 -- 9 December 2008 9 of 11 NXP Semiconductors BSS84 P-channel enhancement mode vertical DMOS transistor 11. Legal information 11.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 11.2 Definitions Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Quick reference data -- The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 11.3 Disclaimers General -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental 11.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 12. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com BSS84_5 (c) NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 -- 9 December 2008 10 of 11 NXP Semiconductors BSS84 P-channel enhancement mode vertical DMOS transistor 13. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 10 11 11.1 11.2 11.3 11.4 12 13 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 9 Legal information. . . . . . . . . . . . . . . . . . . . . . . 10 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Contact information. . . . . . . . . . . . . . . . . . . . . 10 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'. (c) NXP B.V. 2008. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 9 December 2008 Document identifier: BSS84_5 |
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